A semiconductor device such as a LSI (Large Scale Integrated circuit) or a MOS (Metal Oxide Semiconductor) transistor is manufactured by performing a process such as etching, CVD (Chemical Vapor Deposition) or sputtering on a semiconductor substrate (wafer) serving as a target substrate. In etching, CVD or sputtering process, there has been performed a processing method using plasma as an energy supply source, i.e. plasma etching, plasma CVD, plasma sputtering.
An etching method in which bottoms of a groove and a hole are formed to reach an etching stopper film substantially at the same time during the etching is described in Japanese Patent Laid-open Publication No. 2008-53516.    Patent Document 1: Japanese Patent Laid-open Publication No. 2008-53516
There will be simply explained an example of performing an etching on a target substrate by using an apparatus described in Patent Document 1. Above all, on a silicon substrate serving as a target substrate, for example, a resist mask is formed. Then, a mask layer as a hard mask having a rectangular cross sectional shape is formed. Subsequently, the target substrate on which the mask layer is formed is supported on a supporting table within a plasma etching apparatus. Thereafter, a gas for plasma processing is supplied into a processing chamber under a certain pressure environment and an etching process is performed with plasma generated by a microwave or the like. Thus, it is possible to obtain a required shape in which, for example, a region on which the mask layer is not formed becomes a shallow groove to be an insulating layer later.
In this example, with regard to performing the etching process on the target substrate, there is a possibility that the following problems may occur. It is desirable that a rectangular cross sectional shape of the mask layer may remain as it is during the etching process. To be specific, it is preferable that corners and a flat portion between the corners constituting the rectangular shape be etched downwards in the same rate during the etching process. However, by way of example, if an etching process is performed by using an etching gas with high anisotropy, only corners of the mask layer are actively etched. In this case, in a groove-shaped region to be formed between mask layers, groove's side walls formed by etching may be tapered, i.e. slanted. Such a shape is not desirable.
The present disclosure provides a plasma etching apparatus capable of accurately performing an etching process in a desirable shape with more accuracy.
Further, the present disclosure provides a plasma etching method capable of performing an etching process in a desirable shape with more accuracy.
Furthermore, the present disclosure provides a semiconductor device manufacturing method capable of performing an etching process in a desirable shape with more accuracy.